Boolean Help

Boolean Minimizer

SimpleSolver home

The Boolean Equation (or Boolean algebra) software minimizes and generates truth tables for one or a series of Boolean equations and/or truth tables.  Operator formats are supported for ABEL, C, C++, PALASM, Verilog, VB and VHDL languages.

Boolean minimization is automated using an Espresso(© UC Berkeley) executable to implement Karnaugh map reduction.

The Input window can have one or more Boolean equations or truth tables.  Data can be typed in, pasted, loaded from a file (File/Open or Examples menus), or a file can be dragged-and-dropped onto the Input window.   File data must be in standard ASCII text format.

Selection - If one or more Boolean equations (or truth tables) are selected (highlighted), only the selected equation(s) will be processed.  Otherwise all equations will be processed.

Minimization - Refer to the Overview (Help menu) for a comparison of Boolean (BEQ) vs. Logic Design Auto/Synthesis (SYN) minimization

Each equation must consist of one variable name followed by an "=" or ":=", and then one or more variable names with Boolean operators.

Each equation must end with a semi-colon ";"

Examples:     F = A or (B and C);     f := (a || (!b && !c));

1.1 Compact Format

Equations can also be in a compact/terse format. However this format has a number of limitations:

    a.   Equation must be on one line
    b.   Names can only be one letter long: a-z A-Z
    c.   "=" must be used, ":=" is not allowed
    d.   The Not operator is " ' ", Or operator is "+", And operator is implied
    e.   Parentheses are not allowed
    f.   Each equation must end with a period "."
    g.   Comments ('comment or //comment) are allowed after the period

Examples:    F=A+BC.             //  F = A or (B and C);
                    f = a + b' c'.        //  f = a or (not b and not c);

Each truth table input must consist of a row of variable names followed by one or more rows of logic state (1/0/x) values. ('x' may also be represented by an 'X' or '-' character).

A semicolon (;) must follow the last row of logic states.

Input truth tables can be partial (do not specify all binary combinations) or complete.

Partial Truth Table Example:

     a b c  Function    ' Function of (3) variables
     0 0 0     1
     0 1 1     0
     1 1 0     1 ;

2.1 Multiple-Output Truth Table
Multiple outputs can be specified by adding a colon (:) between the input names and the output name(s).

Example: file Truth-Table-AND-OR-XOR.txt has (3) outputs F G H which are 'and', 'or', 'xor' functions

      A B : F G H
      0 0   0 0 0
      1 0   0 1 1
      0 1   0 1 1
      1 1   1 1 0;

2.2 Truth Table Fill
A partial truth table such as the one above will be filled in to create a full truth table before Minimize or Truth Table output operations.  The truth table result for each unspecified row will be set to '0'.  A warning comment at the end of these rows, "unspecified", will mark the rows that were missing in the specification.

The Truth Table output for the above "a b c" truth table is:

     a b c  Function    ' Function of (3) variables
     0 0 0     1
     0 0 1     0  ' unspecified
     0 1 0     0  ' unspecified
     0 1 1     0  
     1 0 0     0  ' unspecified
     1 0 1     0  ' unspecified
     1 1 0     1
     1 1 1     0;  ' unspecified

CAUTION: If the SORT TERMS option is checked, columns in the Output window may be re-ordered relative to the Input window.  When resolving unspecified or redundant rows, de-selecting the SORT TERMS option is recommended.

2.3 Don't care (x) Expansion
A truth table with logic state values of x will be expanded replacing each x with a 0 or a 1 to cover all implied combinations.

For example

    X Y Z  Function
    0 x 0     1

expands to two rows:

    X Y Z  Function
    0 0 0     1
    0 1 0     1

2.4 Redundant Rows
If a truth table row has no effect on the truth table, that row is considered to be redundant to a previous row and a warning will be reported.

    d e f  Function
    0 0 x     1
    0 0 1     1

"Input truth table row is redundant with one or more previous rows at Line 3"

It is a good practice to eliminate all redundant rows

2.5 Conflicting Rows
If an initial or expanded truth table row specifies a different truth table result than a previous row, an error will be reported.

    g h j  Function
    0 0 0     1
    0 0 0     0

"Line 2 in the Input truth table conflicts with "000 0" at line 3"

Any of the following symbols can be used as Boolean equation operators:

    not   /  !
    and   *  &  &&
    or    +  #  |  ||
    xor   $  ^

Example: X = !(A*B & C) || (D && E);

Boolean equation operators are evaluated in the following order:

    Not, And, Nand, Or, Nor, Xor, Xnor

That is, all Not operations are evaluated first, then all And operations, etc.
If the same operator is used multiple times, the operators are evaluated from left to right.
Parentheses can be used to explicitly override the order of precedence.


   1. If the equation is:  F = A and A or B;
     "A and A" is evaluated first and results in "A"
     Then "A or B" is evaluated and results in "A or B"

   2. If the equation is:  F = A and (A or B);
      "A or B" is evaluated first and results in "A or B"
      Then "A and (A or B)" is evaluated and results in "A"

Variable names can be up to 32 characters in length.

Up to 20 variables can be used in a Boolean equation or a truth table.

Names consisting only of numbers, such as "0" or "123", are not allowed; this avoids confusion with logic state (1/0) values.

Additional restrictions, which differ for Boolean equations vs. truth tables, are listed below.

5.1 Boolean Equation Names
Boolean Equation variable names cannot include operator symbols.

The following characters cannot be used in a variable name: space tab * + & | = # $ ^ / ! ; or character(s) beginning a comment: // -- ' # .

Parentheses and colon characters ( ) : have restricted usage in variable names, but can be used as shown in the following example:

       F(7:0) = A(15:8) + B(7:4)(3:0);

Parentheses must be matched and cannot be nested.  For Boolean Equation names colon ":" characters must be enclosed by parentheses.

5.2 Compact Boolean Equation Names
Compact Boolean Equation names can only be one character long and can only be a lower-case or upper-case letter: a-z A-Z

5.3 Truth Table Names
Truth tables variable names cannot include space, tab, semi-colon ";" or character(s) beginning a comment: // -- ' # .

The colon ":" character can be used as part of a Truth table name but not a name by itself since " : " is reserved as a separator between input and output variable names - see Section 2.1 Multiple-Output Truth Table.

In addition Truth tables variable names cannot be a Boolean equation operator listed in Section 3

There are no other restrictions.  However, for compatibility with Boolean equation names and the Logic Design tool, the rules of Section 5.1 are recommended.


Operator Format 0-2  :  Not case sensitive

Operator Format 3 (C/C++/Verilog) : Variable names are case sensitive; Input operators (and/OR/nOt) are not.

Boolean equation and Truth table comments begin with " ' " or "//" and extend to the end of the line.

Boolean equation comments may also begin with "--".
However truth table comments may not begin with "--" since the "-" character is equivalent to an "x" (don't care) state, and truth table sequences such as "--" or "---" may occur.

Truth table comments may also begin with "#".
However Boolean equation comments may not begin with "#" since the "#" character is a Boolean equation 'or' operator.


The Search box can be used to highlight signal names, numbers or text in the Output window.  To search, enter the text to be found and then press the Enter key.  This will highlight up to 100 instances of the Search text.

To clear all highlighting, delete all text in the Search box and press Enter.

Output data and formats can be selected by the following options:

Comment Lines - Comment lines in the Input window are shown in the Output window.

Input Eqn/TT - Boolean equations or Truth Tables in the Input window are shown in the Output window.

Truth Table-full - A complete truth table is generated for each Boolean Equation or Truth Table input.

If the number of variables is <= 10, the truth table values are aligned with their respective names.
If the number of variables is > 10, there are no spaces between truth table 0/1 characters in order to save memory space and display time.

An Input truth table with logic state values of "x" (don't care) will be expanded, replacing each x with a 0 or a 1 in all implied truth-table lines.

Minimize - Each Input Equation or Truth Table is minimized

Invert & Minimize - Each Input Equation or Truth Table is inverted and then minimized

Align Minterms - Each Boolean equation minterm is printed on a separate row

PLA Truth Table - Show minimized Espresso truth table in PLA (Programmable Logic Array) format for each Boolean Equation input or Truth Table input. If Invert & Minimize is checked, the PLA table will be the minimized INVERTED Input Equation or Truth Table. The PLA format is much more compact than the Truth Table-full format;  the PLA format has no spaces between 01- characters and it only shows truth table states in which the output is a logic 1.

Logic Design - A truth table is generated for each Boolean Equation input or Truth Table input in a format compatible with the Logic Design (SYN) tool.

This truth table can be exported by copy/paste - Copy (Ctrl C) from the Boolean Output window and Paste (Ctrl V) to the Logic Design Input window - or by saving the Boolean Output to a file and then opening the file at SYN.

SYN can then:
- Reformat the Boolean truth table as a waveform or timing diagram (SYN Timing Only option)
- Minimize the Boolean equation using any mix of part types (and, or, inv, nand, nor, xor, xnor)
- Generate one or more corresponding logic circuits

CAUTION: Except for very simple Boolean expressions, SYN is much slower than BEQ since the SYN search time increases exponentially with the number of variables and the number of parts.
SYN has been optimized for its default and-or PARTS; other gate types, such as nand, generally take much more time to find solutions.

For example, file "4 Variable XOR.txt" which solves in 0.03 seconds with BEQ and 33 seconds with SYN and4-or8 parts, will require SYN many hours to find a solution using nand parts. (However, since this is a special case of an XOR function, SYN is even faster than BEQ using xor/xnor parts).

Sort Terms - Variable names and Boolean equation minterms are sorted in alphabetical order

Operator Format - Numbers 0-3 select the format of Boolean NOT AND OR operators shown in the Output window:

  Number     NOT      AND      OR        Language      
0 not and or VHDL  VB
1 / * + PALASM
2 ! & # ABEL
3 ! && || C  C++  Verilog